Embodiments of the present embodiments relate to electronic fuse (efuse) programming under low voltage power supply and process limitations for an integrated circuit in either wafer or packaged form.
Referring to FIG. 1A, there is a current-voltage diagram of a semiconductor controlled rectifier (SCR) of the prior art. FIG. 1B is a simplified diagram of the SCR showing the PNPN impurity layers and intervening junctions J1-J3. Here and in the following discussion it should be understood that a semiconductor controlled rectifier may also be called a silicon controlled rectifier or a thyristor as described by S. M. Sze, “Semiconductor Devices Physics and Technology” 148-156 (John Wiley & Sons 1985). In general, a silicon controlled rectifier is a special case of a semiconductor controlled rectifier that is specifically formed on a silicon substrate. The current-voltage diagram shows a reverse blocking region 100 where junctions J1 and J3 are reverse biased, but junction J2 is forward biased. By way of contrast, junctions J1 and J3 are forward biased, but junction J2 is reverse biased in the forward blocking region 102. At switching voltage Vsw 104, the SCR switches from the forward blocking region to a holding voltage (Vh) and holding current (Ih) region 106. In this mode all three junctions J1-J3 are forward biased and the minimum holding voltage across the SCR may be as low as a single diode drop or approximately 0.7 V. In holding region 106, therefore, the SCR functions as a near ideal switch with very little power dissipation due to the low holding voltage and holding current.